1. Field of the Invention
The present invention relates generally to DC offset cancellation in a circuit, and more particularly to the recalibration of DC offset cancellation in radio frequency circuits.
2. Prior Art
Many electronic systems suffer from a problem known as direct current (DC) offset. Specifically, this means that there is an error value between an input signal and an output signal in a circuit that is generally constant, and not dependent on the frequency at which the circuit happens to operate. This offset may require cancellation, as it impacts the precision of operation of a circuit as the circuit moves out of its optimal design operating point. In some cases it can also lead to improper functioning of the circuit.
Known in the art are two types of DC offset cancellation: static DC offset cancellation, and dynamic DC offset cancellation. An exemplary static DC offset cancellation circuit 100 is shown in FIG. 1. An amplifier 110 receives an input and provides an output that is sampled by digital offset calibration circuit 120. The measurement of the DC offset takes place when the system is initialized, and the measured offset is digitized and loaded into register 130. The value in register 130 is then used to calibrate amplifier 110, typically through some form of digital to analog converter associated with the analog amplifier 110, so that the DC offset cancellation is achieved. While in most cases this value remains unchanged over time if variations in time and temperature are negligible, it is possible to periodically cause the circuit to calibrate by repeating the calibration process. While a digital implementation is shown, it is also possible to have analog implementations to achieve the same result. The disadvantage of this circuit, analog or digital, is that it does not adjust over time, or otherwise requires the diversion from an operating mode to a calibration mode.
In a dynamic DC offset cancellation, there is provided a negative feedback loop where a correction value is constantly fed to the circuit. In most cases the feedback loop is analog, and an adequate size capacitor or another memory type element is used in the feedback loop for stability purposes. A person skilled-in-the-art would note that in this case, stability is traded for response time, making this type of a circuit too slow for some radio frequency (RF) applications. This kind of implementation may further lead to a constant current consumption, which must be tolerated as part of this type of solution. This is particularly disadvantageous in battery powered devices.
Therefore, due to the limitations present in prior art solutions, there is a need for DC offset cancellation circuits that will be sufficiently fast so as to operate in an RF application. It would be further advantageous if such a solution would provide for a constant fine-tuning, or recalibration, to address changes in DC offset of the circuit.